While the scaling down of the device feature size in a semiconductor integrated circuit (IC) continues in the pursuit of smaller, faster, and more complex circuit functions on a single integrated circuit, maintaining high drive current at scaled voltages and smaller MOSFET gate dimensions generally becomes more important. Device drive current is closely related to parameters such as gate dimension, gate capacitance, and carrier mobility. Among the various technology innovations made to maintain high MOSFET drive current, high-k (dielectric constant) gate dielectrics and metal gate electrodes are commonly adopted to increase gate capacitance of MOSFETs in advanced technology.
Silicon oxide (SiO2) is widely used as gate dielectric layer for MOSFETs. However, device feature size scaling in advanced technology may lead to a very thin gate SiO2 layer and, thus, the gate leakage current may become unacceptably large. High-k gate dielectrics may be used to replace SiO2 (k=3.9) gate dielectric in a sense that high-k gate dielectrics provide a thicker gate dielectric layer and hence leak less, while being able to maintain a desired large gate capacitance and thus a large device drive current. Drive current performance also may be improved through the use of metal gates. Compared to a conventional polysilicon (poly) gate, the use of metal gates tends to increase device drive current by eliminating the poly depletion effect.
In an existing high-k, metal gate MOSFET fabrication approach, hafnium oxide HfO2 (k=20) or zirconium oxide ZrO2 (k=23) are used as high-k materials to form the gate dielectric layer. Such high-k materials are typically deposited on a substrate sensitive to oxidation (e.g., silicon or germanium) by a deposition process, such as atomic layer deposition (ALD). In practice, an interfacial oxide layer is commonly formed on a substrate before the deposition of the high-k materials. The interfacial oxide layer may facilitate the formation of the nucleation sites that enhance the desired metallic precursor adsorption, and hence improve the quality of the high-k gate dielectric layer. A layer of metal is then deposited by a deposition process, such as physical vapor deposition (PVD), chemical vapor deposition (CVD), AVD atomic vapor deposition (AVD), ALD, or plasma-enhanced ALD (PEALD), forming the gate metal layer. A poly cap layer may be subsequently deposited over the metal gate layer in an effort to adapt the high-k, metal gate MOSFET fabrication processes to an existing CMOS manufacturing flow. A photolithography and gate stack etching process may then be performed to form the gate electrode. After that, a conventional source/drain implantation process may be conducted, followed by one or more strong thermal cycles, such as a flash annealing, laser annealing, rapid thermal annealing (RTA) used in conventional semiconductor manufacturing middle of the line (MOL) and back end of the line (BEOL) processing flows.
However, the existing high-k, metal gate MOSFET fabrication approach is problematic in at least the following ways. Firstly, when a PVD process (e.g., plasma sputtering) is used in metal gate deposition, the ion bombardment involved may cause plasma damage in the high-k gate dielectric and interfacial layer, and thus lead to carrier mobility degradation. Secondly, when non-PVD (e.g., CVD, AVD, ALD and PEALD) techniques are employed to form the gate metal layer, they tend to generate a high oxygen content within the deposited film. Moisture may also be absorbed in the film due to the lower density of the film thus formed. The oxygen content and the existence of moisture in the deposited metal film and the necessity of performing thermal cycles in the MOL and BEOL process flows may lead to an increase of the interfacial oxide layer, a phenomenon known as interfacial oxide layer regrowth. This problem may cause a significant MOSFET EOT increase, threshold voltage shift, among others detrimental effects. Thirdly, the process of forming the gate metal layer and the process of depositing the poly cap layer are typically carried out in separate processing facilities. The deposited metal films may be oxidized and absorb moisture when standing in the queue for the poly cap layer deposition. Replacement of the existing deposition tools may be very costly.